This document relates generally to semiconductor devices and, more specifically, to methods of forming insulated gate devices and structures.
Insulated gate field effect semiconductor transistor (IGFET) devices have been used in many power conversion and switching applications, such as dc-dc converters, electric vehicles, variable speed refrigerators, air-conditioners, and other white goods. IGFET devices include metal oxide FETs (MOSFETs), insulated gate bipolar transistors (IGBTs), and MOS gated thyristors. In a typical IGFET, a gate electrode provides turn-on and turn-off control with the application of an appropriate gate voltage.
There is a class of IGFET devices in which the gate electrodes have been formed in trenches that extend away from a major surface of a semiconductor material, such as silicon. Current flow in this class of trench-gated devices is primarily in a vertical direction through the device, and, as a result, device cells can be more densely packed. All else being equal, the more densely packed device cells can increase the current carrying capability and reduce on-resistance of the device.
One disadvantage of trench-gated IGFET devices is that capacitances associated with the gate electrode have led to switching losses, which manufacturers have attempted to reduce. Such attempts have included structures that have used thickened dielectric structures where the gate electrode adjoins, for example, the drift region. However, such attempts have used spacer processes and multiple trench etch steps to form the thicker dielectric structures, which have increased manufacturing costs. Also, such attempts have not been flexible and have not supported multiple topographies or dielectric configurations within a single device.
Accordingly, it is desirable to have a method and structure that reduce gate capacitances in trench-gated semiconductor devices. Also, it is desirable for the method and structure to be integrated easily into existing process flows and to be supportive of multiple gate structure configurations within a single device.
For simplicity and clarity of illustration, elements in the figures are not necessarily drawn to scale, and the same reference numbers in different figures denote generally the same elements. Additionally, descriptions and details of well-known steps and elements may be omitted for simplicity of the description. As used herein, current-carrying electrode means an element of a device that carries current through the device, such as a source or a drain of an MOS transistor, an emitter or a collector of an IGBT or bipolar transistor, or a cathode or anode of a diode. Also, a control electrode means an element of the device that controls current through the device, such as a gate of a MOS transistor or an IGBT or a base of a bipolar transistor. Although the devices are explained herein as certain N-channel devices, a person of ordinary skill in the art understands that P-channel devices and complementary devices are also possible in accordance with the present description. For clarity of the drawings, regions (for example, doped regions) within the device structures may be illustrated as having generally straight-line edges and precise angular corners; however, those skilled in the art understand that due to processing effects, the edges of regions are generally not straight lines and the corners are not precise angles.
Furthermore, the term “major surface” when used in conjunction with a semiconductor region or substrate means the surface of the semiconductor region or substrate that forms an interface with another material, such as a dielectric, an insulator, a conductor, or a polycrystalline semiconductor. The major surface can have a topography that changes in the x, y and z directions.
In addition, structures of the present description can embody either a cellular-base design (in which the body regions are a plurality of distinct and separate cellular or stripe regions) or a single-base design (in which the body region is a single region formed in an elongated pattern, typically in a serpentine pattern or a central portion with connected appendages). However, one embodiment of the present description will be described as a single-base design throughout the description for ease of understanding. It should be understood that the present disclosure encompasses both a cellular-base design and a single-base design.